[发布时间:10-11-19 来源: 发布者:admin 点击次数:]

  High-performance, Low-power AVR 8-bit Microcontroller
  Advanced RISC Architecture
  131 Powerful Instructions Most Single-clock Cycle Execution
  32 x 8 General Purpose Working Registers
  Fully Static Operation
  Up to 20 MIPS Throughput at 20 MHz
  On-chip 2-cycle Multiplier
  Nonvolatile Program and Data Memories
  16/32/64K Bytes of In-System Self-Programmable Flash Endurance: 10,000 Write/Erase Cycles
  Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation
  512B/1K/2K Bytes EEPROM Endurance: 100,000 Write/Erase Cycles
  1/2/4K Bytes Internal SRAM
  Programming Lock for Software Security
  JTAG (IEEE std. 1149.1 Compliant) Interface
  Boundary-scan Capabilities According to the JTAG Standard
  Extensive On-chip Debug Support
  Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
  Peripheral Features
  Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
  One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
  Real Time Counter with Separate Oscillator
  Six PWM Channels
  8-channel, 10-bit ADC Differential mode with selectable gain at 1x, 10x or 200x
  Byte-oriented Two-wire Serial Interface
  Two Programmable Serial USART
  Master/Slave SPI Serial Interface
  Programmable Watchdog Timer with Separate On-chip Oscillator
  On-chip Analog Comparator
  Interrupt and Wake-up on Pin Change
  Special Microcontroller Features
  Power-on Reset and Programmable Brown-out Detection
  Internal Calibrated RC Oscillator
  External and Internal Interrupt Sources
  Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Extended Standby
  I/O and Packages
  32 Programmable I/O Lines